Additive printing techniques have been widely investigated for fabricating multilayered electronic devices. In this work, a layer-by-layer printing strategy is developed to fabricate multilayered electronics including 3D conductive circuits and thin-film transistors (TFTs) with low-temperature catalyzed, solution-processed SiO2 (LCSS) as the dielectric. Ultrafine, ultrasmooth LCSS films can be facilely formed at 90 °C on a wide variety of organic and inorganic substrates, offering a versatile platform to construct complex heterojunction structures with layer-by-layer fashion at microscale. The high-resolution 3D conductive circuits formed with gold nanoparticles inside the LCSS dielectric demonstrate a high-speed response to the transient voltage in less than 1 µs. The TFTs with semiconducting single-wall carbon nanotubes can be operated with the accumulation mode at a low voltage of 1 V and exhibit average field-effect mobility of 70 cm2 V-1 s-1 , on/off ratio of 107 , small average hysteresis of 0.1 V, and high yield up to 100% as well as long-term stability, high negative-gate bias stability, and good mechanical stability. Therefore, the layer-by-layer printing strategy with the LCSS film is promising to assemble large-scale, high-resolution, and high-performance flexible electronics and to provide a fundamental understanding for correlating dielectric properties with device performance.
Keywords: SiO 2 dielectric; carbon nanotubes; layer-by-layer printing; thin-film transistors; three-dimensional conductive circuits.
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