Correction: 12-state multi-level cell storage implemented in a 128 Mb phase change memory chip

Nanoscale. 2021 Jun 17;13(23):10608-10609. doi: 10.1039/d1nr90100a.

Abstract

Correction for '12-state multi-level cell storage implemented in a 128 Mb phase change memory chip' by Zhitang Song et al., Nanoscale, 2021, DOI: 10.1039/d1nr00100k.

Publication types

  • Published Erratum