We report the technique of trap distribution extraction according to the vertical position of the substrate in the p-MOSFET. This study was conducted on a single device. This technique is an experimental method. Ctrap was extracted based on the deep depletion C-V characteristics. In VFB, the trap level is neutral. When bias is applied, the energy band bends, resulting in modulation of the quasi-Fermi level. The area created by the bending of the energy band is equal to the area created by the Fermi level modulation. The trap level existing in this area becomes charged. Considering this, the spatial distribution of Trap was extracted. The trap extracted by the proposed method has a maximum value at the interface, rapidly decreases, and is distributed up to 8 nm in the vertical direction. The study of trap spatial distribution is expected to be applicable to the separation of trap interface state and bulk trap extraction later.