Hysteresis-free and steep subthreshold swing (SS) are essential for low-power reliable electronics. Herein, MoS2 metal semiconductor field-effect transistors are fabricated with GeSe/MoS2 van der Waals Schottky junction as a local gate, in which the rectification behavior of the heterojunction offers the modulation of channel carriers. The trap-free gate interface enables the hysteresis-free characteristics of the transistors, and promises an ideal SS of 64 mV/dec at room temperature. All the devices operate with a low threshold voltage less than -1 V with desirable saturation behavior. An OR logic gate is constructed with the dual-gated MoS2 transistors by varying the back and top gate voltage. The strategy present here is promising for the design of low-power digital electronics based on 2D materials.