A 100-Mhz Bandwidth 80-dB Dynamic Range Continuous-Time Delta-Sigma Modulator with a 2.4-Ghz Clock Rate

Yao Xiao; Zhifei Lu; Zhaofeng Ren; Xizhu Peng; He Tang

doi:10.1186/s11671-020-3284-4

A 100-Mhz Bandwidth 80-dB Dynamic Range Continuous-Time Delta-Sigma Modulator with a 2.4-Ghz Clock Rate

Nanoscale Res Lett. 2020 Mar 6;15(1):58. doi: 10.1186/s11671-020-3284-4.

Authors

Yao Xiao¹, Zhifei Lu¹, Zhaofeng Ren¹, Xizhu Peng¹, He Tang²

Affiliations

¹ School of Electronic Science and Engineering, SoC Design Center, University of Electronic Science and Technology of China, Chengdu, 610054, China.
² School of Electronic Science and Engineering, SoC Design Center, University of Electronic Science and Technology of China, Chengdu, 610054, China. tanghe@uestc.edu.cn.

Abstract

The bandwidth of a ΔΣ modulator is limited by the clock rate due to the oversampling ratio requirement. As the nanoscale CMOS processes are developing rapidly, it is possible to design wide bandwidth and high dynamic range continuous-time ΔΣ modulators for high-frequency applications. This paper proposes a 3rd-order 4-bit continuous-time ΔΣ modulator with a single-loop feedforward topology. This modulator is designed in a 40-nm CMOS process and achieves 80-dB dynamic range and a 100-MHz bandwidth at a clock rate of 2.4 GHz. The modulator consumes 69.7 mW from 1.2 V power supply.

Keywords: Continuous-time; Delta-sigma modulator; Nanoscale CMOS process; Wide-bandwidth.

Abstract

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