In this paper, we present the FPGA implementation of an approximate Hilbert Transform-based envelope detector to compute the magnitude of the received ultrasound echo signals in real-time using a Model-based design flow. The proposed architecture exploits the negative odd-symmetry and interleaved zero-valued coefficients of a Hilbert Transform-based FIR filter to reduce hardware resource requirements and complexity. The hardware design is modeled using the DSP Builder development tool allowing the automatic generation of HDL algorithms directly from the Matlab/Simulink environment. The generated VHDL code was synthesized for an Intel Stratix IV FPGA and validated on a Terasic DE4-230 board. The accuracy and performance of the envelope detector are analyzed with real ultrasound phantom data for different filter orders, coefficient length and two filter design methods: Equiripple and Least-Squares. The normalized residual sum of squares (NRSS) and the normalized root mean square error (NRMSE) cost functions are used for comparison with the reference absolute value of the Matlab Hilbert function. The results demonstrate that the proposed method yields similar results to conventional envelope detection methods, while being simpler to implement and requiring lower computational cost.