An Efficient Hardware-Oriented Single-Pass Approach for Connected Component Analysis

Fanny Spagnolo; Stefania Perri; Pasquale Corsonello

doi:10.3390/s19143055

An Efficient Hardware-Oriented Single-Pass Approach for Connected Component Analysis

Sensors (Basel). 2019 Jul 11;19(14):3055. doi: 10.3390/s19143055.

Authors

Fanny Spagnolo¹, Stefania Perri², Pasquale Corsonello³

Affiliations

¹ Department of Informatics, Modeling, Electronics and System Engineering, University of Calabria, 87036 Rende, Italy.
² Department of Mechanical, Energy and Management Engineering, University of Calabria, 87036 Rende, Italy.
³ Department of Informatics, Modeling, Electronics and System Engineering, University of Calabria, 87036 Rende, Italy. p.corsonello@unical.it.

Abstract

Connected Component Analysis (CCA) plays an important role in several image analysis and pattern recognition algorithms. Being one of the most time-consuming tasks in such applications, specific hardware accelerator for the CCA are highly desirable. As its main characteristic, the design of such an accelerator must be able to complete a run-time process of the input image frame without suspending the input streaming data-flow, by using a reasonable amount of hardware resources. This paper presents a new approach that allows virtually any feature of interest to be extracted in a single-pass from the input image frames. The proposed method has been validated by a proper system hardware implemented in a complete heterogeneous design, within a Xilinx Zynq-7000 Field Programmable Gate Array (FPGA) System on Chip (SoC) device. For processing 640 × 480 input image resolution, only 760 LUTs and 787 FFs were required. Moreover, a frame-rate of ~325 fps and a throughput of 95.37 Mp/s were achieved. When compared to several recent competitors, the proposed design exhibits the most favorable performance-resources trade-off.

Keywords: FPGAs; connected component analysis; embedded systems; features extraction.