A novel reversible logic gate and its systematic approach to implement cost-efficient arithmetic logic circuits using QCA

Peer Zahoor Ahmad; S M K Quadri; Firdous Ahmad; Ali Newaz Bahar; Ghulam Mohammad Wani; Shafiq Maqbool Tantary

doi:10.1016/j.dib.2017.10.011

A novel reversible logic gate and its systematic approach to implement cost-efficient arithmetic logic circuits using QCA

Data Brief. 2017 Oct 7:15:701-708. doi: 10.1016/j.dib.2017.10.011. eCollection 2017 Dec.

Authors

Peer Zahoor Ahmad¹, S M K Quadri², Firdous Ahmad³, Ali Newaz Bahar⁴, Ghulam Mohammad Wani⁵, Shafiq Maqbool Tantary⁶

Affiliations

¹ Department of Computer Science, University of Kashmir, Srinager, Jammu and Kashmir, India.
² Department of Computer Science, Jamia Millia Islamia, New Delhi, India.
³ Department of Electronics & IT, University of Kashmir, Srinager, Jammu and Kashmir, India.
⁴ Department of Information & Communication Technology, Mawlana Bhashani Science and Technology University, Tangail, Bangladesh.
⁵ Department of Physics, Sri Pratap College, Srinagar, Jammu and Kashmir, India.
⁶ Department of Physics, Govt Degree College Patan, Jammu and Kashmir, India.

Abstract

Quantum-dot cellular automata, is an extremely small size and a powerless nanotechnology. It is the possible alternative to current CMOS technology. Reversible QCA logic is the most important issue at present time to reduce power losses. This paper presents a novel reversible logic gate called the F-Gate. It is simplest in design and a powerful technique to implement reversible logic. A systematic approach has been used to implement a novel single layer reversible Full-Adder, Full-Subtractor and a Full Adder-Subtractor using the F-Gate. The proposed Full Adder-Subtractor has achieved significant improvements in terms of overall circuit parameters among the most previously cost-efficient designs that exploit the inevitable nano-level issues to perform arithmetic computing. The proposed designs have been authenticated and simulated using QCADesigner tool ver. 2.0.3.

Keywords: Adder; Adder–subtractor; F-Gate; QCA; QCADesigner; Subtractor.