Designing hybrid gate dielectric for fully printing high-performance carbon nanotube thin film transistors

Nanotechnology. 2017 Oct 27;28(43):435203. doi: 10.1088/1361-6528/aa87fa. Epub 2017 Aug 23.

Abstract

The electrical characteristics of carbon nanotube (CNT) thin-film transistors (TFTs) strongly depend on the properties of the gate dielectric that is in direct contact with the semiconducting CNT channel materials. Here, we systematically investigated the dielectric effects on the electrical characteristics of fully printed semiconducting CNT-TFTs by introducing the organic dielectrics of poly(methyl methacrylate) (PMMA) and octadecyltrichlorosilane (OTS) to modify SiO2 dielectric. The results showed that the organic-modified SiO2 dielectric formed a favorable interface for the efficient charge transport in s-SWCNT-TFTs. Compared to single-layer SiO2 dielectric, the use of organic-inorganic hybrid bilayer dielectrics dramatically improved the performances of SWCNT-TFTs such as mobility, threshold voltage, hysteresis and on/off ratio due to the suppress of charge scattering, gate leakage current and charge trapping. The transport mechanism is related that the dielectric with few charge trapping provided efficient percolation pathways for charge carriers, while reduced the charge scattering. High density of charge traps which could directly act as physical transport barriers and significantly restrict the charge carrier transport and, thus, result in decreased mobile carriers and low device performance. Moreover, the gate leakage phenomenon is caused by conduction through charge traps. So, as a component of TFTs, the gate dielectric is of crucial importance to the manufacture of high quality TFTs from the aspects of affecting the gate leakage current and device operation voltage, as well as the charge carrier transport. Interestingly, the OTS-modified SiO2 allows to directly print horizontally aligned CNT film, and the corresponding devices exhibited a higher mobility than that of the devices with the hybrid PMMA/SiO2 dielectric although the thickness of OTS layer is only ∼2.5 nm. Our present result may provide key guidance for the further development of printed nanomaterial electronics.