Probing Interface Defects in Top-Gated MoS2 Transistors with Impedance Spectroscopy

ACS Appl Mater Interfaces. 2017 Jul 19;9(28):24348-24356. doi: 10.1021/acsami.7b06204. Epub 2017 Jul 6.

Abstract

The electronic properties of the HfO2/MoS2 interface were investigated using multifrequency capacitance-voltage (C-V) and current-voltage characterization of top-gated MoS2 metal-oxide-semiconductor field effect transistors (MOSFETs). The analysis was performed on few layer (5-10) MoS2 MOSFETs fabricated using photolithographic patterning with 13 and 8 nm HfO2 gate oxide layers formed by atomic layer deposition after in-situ UV-O3 surface functionalization. The impedance response of the HfO2/MoS2 gate stack indicates the existence of specific defects at the interface, which exhibited either a frequency-dependent distortion similar to conventional Si MOSFETs with unpassivated silicon dangling bonds or a frequency dispersion over the entire voltage range corresponding to depletion of the HfO2/MoS2 surface, consistent with interface traps distributed over a range of energy levels. The interface defects density (Dit) was extracted from the C-V responses by the high-low frequency and the multiple-frequency extraction methods, where a Dit peak value of 1.2 × 1013 cm-2 eV-1 was extracted for a device (7-layer MoS2 and 13 nm HfO2) exhibiting a behavior approximating to a single trap response. The MoS2 MOSFET with 4-layer MoS2 and 8 nm HfO2 gave Dit values ranging from 2 × 1011 to 2 × 1013 cm-2 eV-1 across the energy range corresponding to depletion near the HfO2/MoS2 interface. The gate current was below 10-7 A/cm2 across the full bias sweep for both samples indicating continuous HfO2 films resulting from the combined UV ozone and HfO2 deposition process. The results demonstrated that impedance spectroscopy applied to relatively simple top-gated transistor test structures provides an approach to investigate electrically active defects at the HfO2/MoS2 interface and should be applicable to alternative TMD materials, surface treatments, and gate oxides as an interface defect metrology tool in the development of TMD-based MOSFETs.

Keywords: capacitance−voltage (C−V); electrical characterization; high-k dielectrics; interface defects; molybdenum disulfide (MoS2); top-gated transistors.