Transparent Flash Memory Using Single Ta2O5 Layer for Both Charge-Trapping and Tunneling Dielectrics

ACS Appl Mater Interfaces. 2017 Jul 5;9(26):21856-21863. doi: 10.1021/acsami.7b03078. Epub 2017 Jun 22.

Abstract

We report reproducible multibit transparent flash memory in which a single solution-derived Ta2O5 layer is used simultaneously as a charge-trapping layer and a tunneling layer. This is different from conventional flash memory cells where two different dielectric layers are typically used. Under optimized programming/erasing operations, the memory device shows excellent programmable memory characteristics with a maximum memory window of ∼10.7 V. Moreover, the flash memory device shows a stable 2-bit memory performance and good reliability, including data retention for more than 104 s and endurance performance for more than 100 cycles. The use of a common charge-trapping and tunneling layer can simplify the fabrication of advanced flash memories.

Keywords: TFT; Ta2O5; charge trapping flash memory; multibit memory; non-volatile memory.