Integration of compound semiconductors with silicon (Si) has been a long-standing goal for the semiconductor industry, as direct band gap compound semiconductors offer, for example, attractive photonic properties not possible with Si devices. However, mismatches in lattice constant, thermal expansion coefficient, and polarity between Si and compound semiconductors render growth of epitaxial heterostructures challenging. Nanowires (NWs) are a promising platform for the integration of Si and compound semiconductors since their limited surface area can alleviate such material mismatch issues. Here, we demonstrate facet-selective growth of cadmium sulfide (CdS) on Si NWs. Aberration-corrected transmission electron microscopy analysis shows that crystalline CdS is grown epitaxially on the {111} and {110} surface facets of the Si NWs but that the Si{113} facets remain bare. Further analysis of CdS on Si NWs grown at higher deposition rates to yield a conformal shell reveals a thin oxide layer on the Si{113} facet. This observation and control experiments suggest that facet-selective growth is enabled by the formation of an oxide, which prevents subsequent shell growth on the Si{113} NW facets. Further studies of facet-selective epitaxial growth of CdS shells on micro-to-mesoscale wires, which allows tuning of the lateral width of the compound semiconductor layer without lithographic patterning, and InP shell growth on Si NWs demonstrate the generality of our growth technique. In addition, photoluminescence imaging and spectroscopy show that the epitaxial shells display strong and clean band edge emission, confirming their high photonic quality, and thus suggesting that facet-selective epitaxy on NW substrates represents a promising route to integration of compound semiconductors on Si.
Keywords: Si/CdS; Si/InP; aspect ratio trapping; core/shell nanowire; epitaxial growth; facet-selective growth; heterostructure nanowire; selective area epitaxy; selective area growth.