The nonlinear dependence between the duty-cycle of semiconductor nanorod array and its surface reflectance minimization is demonstrated. The duty-cycle control on thin-SiO2 covered Si nanorod array is performed by O(2-) plasma pre-etching the self-assembled polystyrene nanosphere array mask with area density of 4 × 10(8) rod/cm(-2). The 120-nm high SiO2 covered Si nanorod array is obtained after subsequent CF4/O2 plasma etching for 160 sec. This results in a tunable nanorod diameter from 445 to 285 nm after etching from 30 to 80 sec, corresponding to a varying nanorod duty-cycle from 89% to 57%. The TM-mode reflection analysis shows a diminishing Brewster angle shifted from 71° to 54° with increasing nanorod duty-cycle from 57% to 89% at 532 nm. The greatly reduced small-angle reflectance reveals a nonlinear trend with enlarging duty-cycle, leading to a minimum surface reflectance at nanorod duty-cycle of 85%. Both the simulation and experiment indicate that such a surface reflectance minimum is even lower than that of a uniformly SiO2 covered Si substrate on account of its periodical nanorod array architecture with tuned duty-cycle.